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Author SHA1 Message Date
Mark Pizzolato
4b45b04c29 SCP: Enable Runtime REGister entry validation and checking during build 2020-03-07 20:17:36 -08:00
Mark Pizzolato
09ce5a62e3 PDP6, KA10, KI10: Update register definitions for checking 2020-03-07 20:01:26 -08:00
Mark Pizzolato
f8f7ba3492 I1401, I7094, ID16, ID32, HP2100 and S3: Correct register definitions for checking 2020-03-07 19:59:04 -08:00
Mark Pizzolato
7ee3af8b9d I7000: Update register definitions for checking 2020-03-07 19:56:55 -08:00
Mark Pizzolato
f2435c91f4 B5500: Update register definitions for checking 2020-03-07 19:55:49 -08:00
Mark Pizzolato
7015ad395c SCP: sim_timer_init must only run early, and potential NULL dereference 2020-03-07 19:54:25 -08:00
Mark Pizzolato
938aa58f3a SCP: Provide ways for VM to specify sim_interval adjustment and step units 
This affects the output of some SCP commands (including help).  The
results are cosmetic, but allows the simulator to provide correct descriptive
information.
 2020-03-07 10:13:18 -08:00
Mark Pizzolato
42bb47d961 TIMER: Be sure to empty the event queue at timer initialization 
If a reset_all_p() happens before the timing subsystem is initialized,
events can be queued with unreasonable timing measurements.
 2020-03-07 07:05:46 -08:00
Mark Pizzolato
e6d8d593b4 VAX750, VAX8200: Update UBA device map register REG initializers 2020-03-06 16:42:04 -08:00
Mark Pizzolato
80d9393b83 alpha, HP2100, ID16, ID32, I7094, PDP11 and VAX: Fix array REG definitions 
Array REGister definitions have been made consistent by passing the
name of the array object.  This allows proper sizing assessment
to occur in the register validation logic.

Some previously described array REGister initializers were not really
arrays.  Some were structures and others were merely pointers to
someplace in memory that it was desirable to view as a scalar array.

Structures or other blob data should now use SAVEDATA.  Virtual
arrays intended to be interpret some part of memory as scalar data
now use VBRDATA initializers.
 2020-03-06 16:29:17 -08:00
Peter Schorn
5a293ac4ff AltairZ80: Additional register updates 2020-03-06 15:34:03 -08:00
Mark Pizzolato
565596a5af ETHER: Minor adjustments for building on the simh 3.x codebase 2020-03-06 15:32:12 -08:00
Mark Pizzolato
b76fd3ed44 SCP: Preparing for dynamic testing of simulator REGister definitions at startup 2020-03-06 15:28:52 -08:00
Mark Pizzolato
2e41007e0d AltairZ80: Adjust REG array descriptors (BRDATA) to provide array object addrs 
No address value are changed, by a pointer the the array object is
explicitly provided which allows validation logic to determine the
size of the array object rather than merely it's first element.
 2020-03-03 07:50:33 -08:00
Peter Schorn
504aad14cf AltairZ80: Update clock register definitions 2020-03-03 02:31:51 -08:00
Mark Pizzolato
7757ecada3 I7000: Updated register definitions. 2020-03-02 09:08:13 -05:00
Mark Pizzolato
74d61d2d87 B5500: Updated register definitions. 2020-03-02 09:07:24 -05:00
Mark Pizzolato
f07015078c PDP11 and VAX: Fix TD device IBUF and OBUF register definitions 2020-03-01 12:12:46 -08:00
Mark Pizzolato
90eddfc733 alpha, HP2100, ID16, ID32, PDP11 and VAX: Normalize array REG definitions 
Array REGister definitions have been made consistent by passing the
address of the whole array object.  This allows proper sizing assessment
to occur in the register validation logic.
 2020-03-01 12:11:13 -08:00
Mark Pizzolato
7b75c89aaf Interdata 16 & 32: Fix DP device width of RTIME, STIME, and WTIME definitions 2020-03-01 12:09:47 -08:00
Mark Pizzolato
762bb93199 alpha: Fix DMAPEN register definition 2020-03-01 12:09:13 -08:00
Mark Pizzolato
12d6c1fce4 PDP11: Fix INT register definitions in PTR and PTP devices 2020-03-01 12:08:24 -08:00
Mark Pizzolato
6da28c516f VAX730, VAX750: Remove invalid REGister definitions in console TU58 (TD) device 2020-03-01 12:07:34 -08:00
Mark Pizzolato
471dbc5f66 B5500: Fix Windows build to define USE_INT64 2020-02-28 08:08:33 -08:00
Mark Pizzolato
93aa0de425 I7094: Reorganize BUF REGisters to avoid dynamic buffer allocation 
This allows building with dynamic runtime register definition checking
 2020-02-28 07:47:44 -08:00
Mark Pizzolato
b8bf4de34d PDP11 Unibus and Qbus VAX: Correct additional REGs in RQ device 2020-02-28 07:44:41 -08:00
Mark Pizzolato
e06a5d7821 AltairZ80: Fix spelling in register description 2020-02-26 22:03:01 -08:00
Mark Pizzolato
ba7316ea8a IBM1130: Correct the width of the ILSW registers 2020-02-26 21:55:51 -08:00
Seth Morabito
814ce9ea2a 3b2: Fix incorrect register width 
Several registers in the TIMERS device were described
as being 16 bits wide, when they are in fact 8 bits wide.
 2020-02-26 17:27:11 -08:00
Richard Cornwell
6aafb375eb KA10: Updated register definitions. 2020-02-26 20:10:42 -05:00
Richard Cornwell
418ac042db B5500: Updated definition of Q register. 2020-02-26 20:10:02 -05:00
Mark Pizzolato
3b802f644d PDP11, Unibus and Qbus VAX: Correct REG sizes in RQ, TQ and XQ devices 2020-02-26 13:30:21 -08:00
Mark Pizzolato
146f05d1f7 SCP: Cleanup compiler warning about potential buffer truncation 2020-02-25 00:17:49 -08:00
Lars Brinkhoff
8b64e5df1a VIDEO: SDL init/quit gamecontroller subsystem implies joystick. 2020-02-25 06:38:19 +01:00
Lars Brinkhoff
f5a9bed34c DISPLAY: Keep track of device using the display. 
Don't let someone close the display if they're not the one having
opened it.
 2020-02-25 06:38:10 +01:00
Mark Pizzolato
26fa91a335 TIMER: Avoid clocks with changing tick rates as the primary calibrated timer 
Some simulators have clocks that have dynamically programmable tick
rates. Such a clock is only a reliable candidate to be the calibrated
clock if it uses a single tick rate rather than changing the tick rate
on the fly.  Generally most systems like this, under normal conditions
don't change their tick rates unless they're running something that is
examining the behavior of the clock system (like a diagnostic).  Under
these conditions this clock is removed from the potential selection as
"the" calibrated clock that all others are relative to and if necessary,
an internal calibrated clock is selected.
 2020-02-23 00:31:45 -08:00
Mark Pizzolato
1725ed20db ETHER: Update preferred Windows packet capture to be WinPcap 
- Npcap is not currently a superset of WinPcap.  Specifically it doesn't
  allow traffic from simulators to the host system to be received by the
  host system network stack.

As discussed in nmap/nmap#1929 and nmap/nmap#1343
 2020-02-22 19:07:01 -08:00
Richard Cornwell
cc17f044f0 CARD: Clean up typo from Coverity fix. 2020-02-22 22:01:11 -05:00
Mark Pizzolato
721e2f42c5 ETHER: Report Windows Npcap as unsupported in the Ethernet version string 
Current versions of Npcap can talk directly to the host system's network
stack.  This defect was just discovered.  Fortunately, WinPcap 4.1.3 works
as needed and is still functional on Windows 10.

As discussed in nmap/nmap#1929 and nmap/nmap#1343
 2020-02-19 01:39:13 -08:00
Mark Pizzolato
46500ec75e PDP11, Unibus and Qbus VAX: Fix character completion with differing line speeds 2020-02-18 14:51:59 -08:00
Mark Pizzolato
08d2bafb28 TMXR: Remove the ability to detach a serial port while the simulator is running 
As discussed in #782
 2020-02-18 13:55:22 -08:00
Mark Pizzolato
0fca58a6da TMXR: Add documentation for the -U switch when attaching to a listen port 
As mentioned in #782
 2020-02-18 13:31:20 -08:00
Peter Schorn
6c84387ec0 AltairZ80: Fix error handling of bad IMD disks and sector size computation 2020-02-18 11:55:29 +01:00
Mark Pizzolato
7e58080fb5 SCP: Fix file name parser to tolerate a name without any slashes in the path 2020-02-17 21:03:20 -08:00
Mark Pizzolato
a2300fcf95 H316: Fix format types in debug messages 2020-02-17 19:16:15 -08:00
John Forecast
89215d8288 DISK: Fix Coverity flagged issues with tainted data and potential overflow 2020-02-17 19:14:51 -08:00
Mark Pizzolato
545c505f44 PDP11, Unibus and Qbus VAX: Fix VH interrupt delivery 
- A hang during transition from DMA to programmed I/O.  Force
- Change to single character DMA operations before network transmit
 2020-02-17 02:51:02 -08:00
Mark Pizzolato
09ced95ce2 HP2100: Update to early Release 29 which is still simh V4.x API compatible 
Dave Bryan has migrated support for this simulator to http://simh.trailing-edge.com/hp
 2020-02-16 22:25:15 -08:00
Mark Pizzolato
6bbbc19e01 HP3000: Update to early Release 8 which is still simh V4.x API compatible 
Dave Bryan has migrated support for this simulator to http://simh.trailing-edge.com/hp
 2020-02-16 22:24:16 -08:00
Mark Pizzolato
254e173fc1 SCP: Add support for a simulator specific release announce message 2020-02-16 21:46:40 -08:00