This is invoked with STEP -R nnn, or CONT -R. Execution will continue
across any new subroutines which are called and stop after the current
routine executes a RET or RSB instruction.
SET CPU IDLE={OS{:n}} where n is the idle stability delay
which is also the clock calibration delay.
A -D switch on a SHOW -D CPU IDLE command will
display the stability delay as will a SHOW CLOCK command.
simulator time allows instruction history to be precisely correlated with
debug output. It also provides a way to reproduce and review simulation
activities by stopping at predetermined time values (via STEP) to
examine details of simulator state.
disk logging can be useful to compare activities performed in separate
simulator runs.
The MicroVAX II boot ROM has code uses one of these instructions with the
data being referenced somewhere in Qbus space. This is not supposed to be
done according to the architecture specifications, but it must have worked on
real hardware. In any case, as a consequence of this reference to I/O space,
these otherwise non-data modifying instructions can have side effects or
reference data which may change even in an instruction looping on itself.
Given that potential, such use isn't an infinite loop which would otherwise
inspire a drop back to scp.
This allows pending I/O (console, or otherwise) to complete before dropping
back to the sim> prompt. This better simulates the model where scp is analogous
to the console processor on the older VAX simulators. This better addresses the
incomplete I/O problems discussed in #208
Prior logic attempted to load the desired file from the current default directory and if that failed wrote the in memory boot code image to the desired file and then retried the desired load..
A user can still explicitly load a ROM image with a "LOAD -R romfile.bin" command prior to a BOOT attempt if they want to test or otherwise run with a different ROM.
Removed the recently added SET CPU IDLE=SYSV since any SET CPU IDLE command will work for SysV. Existing configurations probably did a SET CPU IDLE=32V which works fine now.
Changed things based on the realization that ANY branch instruction which tests memory and then branches to itself is an idle loop if the branch is taken. This is without regard to address space, access mode, If interrupts are disabled, then it is a hung system and the simulation should halt.
CPU Idle detection for this OS is now supported and the combination of SET CPU IDLE=ULTRIX-1.X and explicitly using a DEQNA device (SET XQ TYPE=DEQNA) will enable the automatic enabling of device interrupt generation.
The goals here being to simplify calling code while getting consistent output delivered everywhere it may be useful.
Modified most places which explicitly used sim_log or merely called printf to now avoid doing that and merely call sim_printf().
- Added event debug support to scp and the vax simulator
- Moved external declarations into include files related to modules which define them and removed random externs from modules which referenced them
- Fixed typos in sim_ether
- Fixed sim_disk and sim_tape to properly manage asynchronous threads on an i/o flush
Fixed auto configure bugs which didn't allow Fixed CSR Addresses or Fixed Vectors to be set using the auto configure information.
Fixed display of address and vectors to indicate that the assigned address and/or vector is in the floating set.
Added extended definitions to the auto configure table to reflect all known potential static and floating and static addresses as of VMS V5.5-2
Changed the name of the VAX 11/780 console floppy device name to RXC from RX (which collides with a Unibus name for the RX11).
