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Author SHA1 Message Date
Howard M. Harte
87581b865f AltairZ80: M68K: Add support for additional 68000 variants 
68000, 68010, 68020, 68030, 68040 and LC/EC variants.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
6cd89205a3 AltairZ80: M68K: Add support for memory-mapped I/O. 
Allows the M68K CPU to take advantage of additional AltairZ80 peripherals.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
7094222ada AltairZ80: SCP300F: Add support for MS-DOS 2.00. 
* Add support for 8259 interrupt controller.
* Add support for Cromemco and Tarbell Monitor ROMs.
* To allow port 0xFE to be used by the simh_dev.
* Use the CPU's SR instead of a SCP300F-specific one.
* 9513 RTC support.
 2022-11-27 14:38:05 -05:00
Tony Lawrence
a06ab20512 TIMER: Support 1ms timer resolution in Cygwin 2022-11-23 11:24:31 -05:00
Patrick Linstruth
8b181a360c AltairZ80: PMMI device DTR/RTS default changes and support for sockets 2022-11-23 11:23:20 -05:00
Patrick Linstruth
e2d422c2d3 AltairZ80: Add support for Morrow Micro Decision 
Moved MMD and MMDM devices under Morrow Devices comment.
 2022-11-23 11:22:51 -05:00
Patrick Linstruth
7a5432d9e2 AltairZ80: Add "MEM" and "REG" simulator-specific commands 
sim> mem df00
DF00 C3 5C E2 C3 58 E2 7F 00 43 6F 70 79 72 69 67 68 .\..X...Copyrigh
DF10 74 20 31 39 37 39 20 28 63 29 20 62 79 20 44 69 t 1979 (c) by Di
DF20 67 69 74 61 6C 20 52 65 73 65 61 72 63 68 20 20 gital Research
DF30 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00     ............
DF40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
DF50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
DF60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ....s...ub...m..
DF70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ..I..tT...e.....
DF80 00 00 00 00 00 00 00 00 08 DF 00 00 5F 0E 02 C3 d....4...l.._0.r
DF90 05 00 C5 CD 8C DF C1 C9 3E 0D CD 92 DF 3E 0A C3 .d..M...>....>..
DFA0 92 DF 3E 20 C3 92 DF C5 CD 98 DF E1 7E B7 C8 23 ..> ..a.....~..#
DFB0 E5 CD 8C DF E1 C3 AC DF 0E 0D C3 05 00 5F 0E 0E ...r........._..
DFC0 C3 05 00 CD 05 00 32 EE E6 3C C9 0E 0F C3 C3 DF ...K..2..<..'.s.
DFD0 AF 32 ED E6 11 CD E6 C3 CB DF 0E 10 C3 C3 DF 0E .2...a...p.P....
DFE0 11 C3 C3 DF 0E 12 C3 C3 DF 11 CD E6 C3 DF DF 0E ...r...0..v.....
DFF0 13 C3 05 00 CD 05 00 B7 C9 0E 14 C3 F4 DF 11 CD .....a.l........

sim> reg
C0Z1M0E1I1 A=02 B=007F D=DF06 H=EA0E S=EA37 P=FA6B ANI 01h
sim> set on
sim> on error reg
sim> s

Step expired, PC: 0FA6D (JZ 0FA69h)
C0Z1M0E1I1 A=00 B=007F D=DF06 H=EA0E S=EA37 P=FA6D JZ 0FA69h
sim> s

Step expired, PC: 0FA69 (IN 10h)
C0Z1M0E1I1 A=00 B=007F D=DF06 H=EA0E S=EA37 P=FA69 IN 10h
sim> s

Step expired, PC: 0FA6B (ANI 01h)
C0Z1M0E1I1 A=02 B=007F D=DF06 H=EA0E S=EA37 P=FA6B ANI 01h
 2022-11-23 11:22:12 -05:00
Howard M. Harte
33aad32550 AltairZ80: TDD: Remove unused variable. 2022-11-19 13:48:34 -05:00
Howard M. Harte
f578ce76a7 AltairZ80: DJHDC: Conditionalize interrupt support. 2022-11-19 13:48:34 -05:00
Tony Lawrence
47908cc371 PDP11: More correction in RK help text (per Paul Koning) 2022-11-18 10:39:49 -05:00
Tony Lawrence
45f6fbaaa4 PDP11: Correct wording for RK MTAB entries and help text 2022-11-18 10:39:49 -05:00
Howard M. Harte
256183232a AltairZ80: Add DJHDC to VS project. 2022-11-15 12:21:58 -05:00
Howard M. Harte
70c2038d5c AltairZ80: Add DJHDC to makefile. 2022-11-15 12:21:58 -05:00
Howard M. Harte
61a520a978 AltairZ80: Morrow HDC-DMA Hard Disk Controller. 2022-11-15 12:21:58 -05:00
Howard M. Harte
bc9dc13f7c AltairZ80: Add Tarbell Double-Density to Visual Studio Project. 2022-11-15 12:21:58 -05:00
Howard M. Harte
4d84c563c2 AltairZ80: Add Tarbell Double-Density controller to makefile. 2022-11-15 12:21:58 -05:00
Howard M. Harte
f77485ca99 AltairZ80: Add Tarbell Double-Density FDC 
This controller is based the wd179x, adding a couple of Tarbell-specific
registers.
 2022-11-15 12:21:58 -05:00
Mark Pizzolato
6c398df0ae simulator tests: Fix test setup to tolerate very busy or slow host systems 
Adjust the RUNLIMIT to specify instructions instead of wall clock time.

On an unfettered system, the sel32 test completes after some 588 million
instructions.  On a slow host system, the system clock tick processing will
add to the total instructions executed.  Increase the limit to 750 million
instructions.
 2022-11-13 11:07:46 -05:00
Mark Pizzolato
756ac0d2a1 BUILDROMS: Fix potential compiler warnings 2022-11-13 11:07:46 -05:00
Paul Koning
2de790dede BESM6: fix warning 
This fixes a warning with some compilers.
 2022-11-10 10:47:49 -05:00
Seth Morabito
f6cf886454 3b2: Improved sim_load procedure 
The previous implementation of sim_load was riddled with little errors.
This change fixes those errors, improves user feedback, and limits the
allowable flags to '-r' and '-o'.
 2022-11-10 10:47:24 -05:00
Howard M. Harte
3719b46524 AltairZ80: SIO: Fix warning for type mismatch. 
Fix warning introduced in PR#108
 2022-11-10 10:45:46 -05:00
Howard M. Harte
71913f26eb AltairZ80: SIO: Add setFCBAddressCmd to simh_dev. 
* Allows setting the FCB address used to send filenames between the host
  and guest operating systems.
* Increment the SIMH device version to SIMH005.
 2022-11-07 09:22:14 -05:00
Jan-Benedict Glaw
5727609e40 STUB: Fix "non-void function does not return a value" warning 
Found with Debian clang version 15.0.3-2 and LTO=1.
 2022-11-07 09:14:23 -05:00
Howard M. Harte
e91fbebe3d AltairZ80: i86: Don't clear segment override on REPE/REPNE 
MASM generates REP CS:MOVSW as:

REP
CS:
MOVSW

The Seattle Computer Products 8086 assembler allows the segment override
as a discrete opcode.  This means that:

CS:
REP
MOVSW

is also possible, and in fact used in the SCP Monitor v1.6.

The i86 emulator was clearing the override flags when REPE/REPNE,
is encountered, which causes the segment override to be lost.
Verifying the behavior of a real 80286 processor in an IBM PC/AT
(5170) using MS-DOS 6.22 DEBUG shows that both instruction sequences
yield the desired segment override.
 2022-11-06 16:41:51 -05:00
Howard M. Harte
e1d27aa167 AltairZ80: i86: Fix bug in AAD instruction. 2022-11-06 16:41:51 -05:00
Mark Pizzolato
3bba1bbe14 s3: Fix out of bounds array reference and string overflow warning 2022-11-05 16:45:48 -04:00
Mark Pizzolato
39d33c4cc9 makefile: Add WARNINGS=ALLOWED make option and change default optimize to -O2 
The CI build specifies OPTIMIZE=-O3 and runs with the default where warnings
are converted to errors.
 2022-11-05 16:45:48 -04:00
Lars Brinkhoff
009d748ad6 PDP11: Enforce limit on number of displays in TV device. 2022-11-02 14:14:14 -04:00
Paul Koning
d1e9358a63 makefile: don't use -fwhole-program 
The GCC documentation explicitly says not to use that option
when -flto is used, and since that is the only place where
the makefile was using it, remove it to conform to the
documented rules.
 2022-11-02 09:21:05 -04:00
Howard M. Harte
7a273d70d7 AltairZ80: wd179x: Improve debugging for WRITE_TRACK. 2022-11-01 21:08:27 -07:00
Howard M. Harte
4cfedd1930 AltairZ80: s100_hdc1001: fix bug in format. 2022-11-01 21:08:20 -07:00
Olaf Seibert
9a1ca7f298 VAX750: Fix another int32_t -> int32 
This was missed in 3a95ba4b.
 2022-10-31 16:48:43 -04:00
Lars Brinkhoff
234be4883b PDP11: Remove fprintf debug statement. 2022-10-31 16:47:28 -04:00
Lars Brinkhoff
50419c18df PDP11: Fix TVSEL register. 
It's sometimes used as a 16-bit register.
 2022-10-31 16:47:28 -04:00
Lars Brinkhoff
8e109fe787 VIDEO: Fix bug handling a redraw event. 
An event pulled from the queue after redraw has been handled needs to
update the vptr pointer.
 2022-10-31 16:46:45 -04:00
Mark Pizzolato
9cfa212e60 makefile: Add OPTIMIZE= command option to change default from -O3 2022-10-30 17:12:05 -10:00
Mark Pizzolato
1792303a9e makefile: Make non debug builds with -O3 and LTO under gcc with -fwhole-program 
- Add missing BUILD_ROMS dependency to pdp11 simulator.  ROMs don't change
  often so this usually didn't matter, but it should be a dependency.
 2022-10-30 02:35:43 -10:00
Lars Brinkhoff
34c4ab3cd5 PDP11: Improve idling. 2022-10-29 14:15:41 -04:00
Lars Brinkhoff
eb359b962f PDP11: Add MB11. 2022-10-29 14:15:41 -04:00
Lars Brinkhoff
6a384854cf PDP11: Add Logo TV raster display. 2022-10-29 14:15:41 -04:00
Mark Pizzolato
2b9e2eba92 github: Update CI workflow build 
- Configure run on push and pull requests
- Use new macos and ubuntu OS images
- Add missing simulators from the build list
- Add potential LTO option for makefile builds
 2022-10-28 15:29:08 -10:00
Mark Pizzolato
bf13a64d9e makefile: Add explicit option LTO=1 to enable Link Time Optimization builds 
When building compiler optimized binaries with the gcc or clang compilers,
invoking GNU make with LTO=1 on the command line will cause the build
to use Link Time Optimization to maximally optimize the results.
Link Time Optimization can report errors which aren't otherwise detected
and will also take significantly longer to complete.
 2022-10-28 15:15:59 -10:00
Richard Cornwell
0cc7747202 I7000: Fixed incorrect definitions. 2022-10-28 09:24:24 -04:00
Bill Beech
55a4b0d424 Intel-MDS: Properly declare multibus_get_mbyte return type 2022-10-26 16:44:58 -07:00
Bill Beech
f03e370c6f Intel-MDS: Update to the latest and fix inconsistent REGister declarations 2022-08-03 13:15:03 -07:00
Mark Pizzolato
5d12b9da4f Visual Studio Projects: Report warnings as errors so CI builds fail on warnings 2022-10-26 06:07:51 -10:00
Mark Pizzolato
a23379e6a8 BESM6: Avoid clang compiler warnings 2022-10-26 10:57:52 -04:00
Mark Pizzolato
cfc59c517f makefile: Make gcc and clang warnings fail builds on compile warnings 
This change allows CI builds to fail without detailed viewing of build output
for gcc and clang builds (all modern compilers).  Thus forcing PR submitters
to find these problems before PRs are merged.  This is done  by compiling
with -Werror for these compilers.

We don't know how to do this for other compilers which may be able to use
the makefile, so warnings there will still proceed to build successfully.
 2022-10-26 10:57:52 -04:00
Lars Brinkhoff
e6106d1ebf display: Fix compiler warning in NG device. 2022-10-26 13:25:35 +02:00