Full modem lines depend on the simulated OS to fully configure the line
parameters (speed, parity, etc.), so setting line speed during a normal
attach violates that behavior. However, when a RESTORE operation is
being performed, we are obliged to restore the OS set line parameters
which we know were already set by the simulated OS.
A user could change the contents of the PSL via a DEPOSIT command.
If the resulting PSL indicates Interrupt Stack and IPL is 0, then this is
equivalent to MTPR #0,#IPL which is explicitly described as "undefined"
When a MTPR #0,#IPL is performed, the VAX chip microcode doesn't check,
neither does the 780 microcode. Nothing bad will happen immediately,
however when an interrupt occurs, the saved PSL will now contain IPL 0
and Interrupt Stack. This combination will cause the REI dismissing the
taken interrupt to fail. To avoid a user manually creating this via
a DEPOSIT command or to potentially detect this condition while stepping
through instructions this check refuses to execute when the PSL is
invalid. This change merely provides an explanation.
On page 5-37 of the VAX SRM (DEC standard 32), the REI pseudo-code defines
exactly what a legal PSL looks like. The check at the beginning of
sim_instr is a direct implementation of that check, intended to prevent
the user from creating an inconsistent PSL through the simulator console.
In a VAX chip, the console code would exit by a genuine REI, and any
illegal value created by the user would cause a system stop (return to the
console).
On page 5-43, the revision history notes that in rev 8 of chapter 5,
MTPR #0,#IPL was made undefined. Because MXPR is privileged, and the
general assumption was that VMS knew what it was doing, no one realized
the potential inconsistency that MTPR #IPL could create until it was
too late. "Undefined" allows any behavior, up to and including blowing up
the system.
Also make all scheduled timing behaviors consistent and not performed by
the input polling unit which may have different scheduling characteristics
to reflect input speed rate limiting.
This allows simulator code to be insulated from any changes which may
be made to the REG structure in the future. The REGDATA macro will be
update as needed to avoid any changes in simulator specific code.
1. Added RP03 support and supporting "SET" commands.
2. Fixed implementation of DPCF (it's a full reset and not blocked by BUSY).
3. Fixed handling of JOB DONE flag (not touched by NOP, SEEK, or RECAL).
The exploit purpose of an EXPECT command is to return control to the SCP
interpreter when data output matches the expect condition; This will then
allow either related action commands specified on the EXCEPT command to
be performed or subsequent commands in the running command file.
The terminal service (in the ISR) forces a CR to be output IMMEDIATELY (before anything in the output queue) when 0212 is seen on input, so it needs to echo as a LF.
I hadn't seen any (other) echo support, so I had assumed the interface was half-duplex, which of course means passwords would appear on the paper!
- Added unix v0 terminal support
- Added 3-cycle databreak set/show entries
- Revised for dynamically allocated memory
- Added support for -u modifier (UC15 and Unix v0)
These changes are to support the Unix v0 bringup and to implement a
"Unix input" mode on the console terminal. In Unix mode, CR and LF are
swapped (so that a modern terminal can use 'enter' instead of CTRK-J to
create the newline Unix expects), escape is mapped to altmode (175),
upper and lower case are enabled and the parity bit is forced to 1. This
most closely matches the characteristics of the KSR-37, but there is no
definitive evidence of the terminal that was actually used.
Need to compile Win32 pthreads library without whole program optimization to
avoid removal of some TLS state. This change was made previously for all other
simulators built with pthreads (asynchronous) support, but the VAX750, VAX730
and the PDP11 were missed.
