Array REGister definitions have been made consistent by passing the
name of the array object. This allows proper sizing assessment
to occur in the register validation logic.
Some previously described array REGister initializers were not really
arrays. Some were structures and others were merely pointers to
someplace in memory that it was desirable to view as a scalar array.
Structures or other blob data should now use SAVEDATA. Virtual
arrays intended to be interpret some part of memory as scalar data
now use VBRDATA initializers.
Programmatic interval timers are not proper candidates for calibrated
clocks since the interval values can change arbitrarily under program
control and then interfer with attempts at proper calibration.
This procedure establishes a telnet listen port solely so that the console
output traffic can be buffered (and not emitted). Since nothing will ever
connect to this port we bound it to the localhost address so that firewall
prompts aren't generated when building in a new directory.
Initialize Coverity flagged uninitialized variable references. Most/all
of these might never have actually occurred with reasonable
packet buffer descripter lists, but zero initialized values will never
hurt.
- MicroVAX I, II and 3900 don't have a DONE bit in the clock status
register, so sim_rtcn_tick_ack() wasn't being called to acknowledge
clock ticks.
- Timer catchup tick criteria didn't work unless the host had a slow
clock tick.
As discussed in #705
- Limit choices to explicitly either G-FLOAT or D-FLOAT for SET CPU INST=
- Compile in all instruction implementations and dynamically use the
enabled ones.
- Different VAX models had different groups of instructions which were
implemented in hardware vs trappng to the OS for emulation. Functionality
has been added to differentiate the various mix of instruction groups for
different models and to display both the groups and the actual instructions.
- Visibility to Instruction groups is provided by SHOW CPU INSTRUCTIONS
and the list of the active instructions implemented and emulated via
SHOW CPU -V INSTRUCTIONS.
- The MicroVAX I CPU handled some execution fault conditions differently
from other VAX systems these differences are now specifically handled.
- Add build time test support to MicroVAX I running EHKAA v1.13
suggested in #683
- Add more CPU debug details relating to exception and interrupt processing
Originally, the VAX allowed immediate operands (8F) to be used without
restrictions in address mode instructions, either standalone or indexed.
Starting with MicroVAX II, immediate indexed became reserved. This
remained true for all subsequent chip implementations. The SRM was
ECOed in March, 1985 to make immediate indexed unpredictable.
In MicroVAX II, immediate g-floating operands didn't work correctly. The
problem was found a couple of months after tape-out. While the index
flows could be fixed, and were fixed according to the microcode revision
history:
; 7-May-84 [RMS] Fixed FD problem in index flows (JLR)
the problem in indexed immediate could only be fixed by a significant
hardware change in an area that was already packed full. The VAX
Architecture Team, which had always been very sympathetic to the
VAX chip efforts, proposed a much simpler solution: make immediate
indexed unpredictable. It was useless, in any case.
I'm rather surprised that this wasn't flagged by the 780 diagnostics.
Maybe it was never tested. It was tested in HCORE (the original MicroVAX I
core diagnostic that is failing), but I removed it subsequently:
; 8-may-85 rms removed indexed immediate tests
Bottom line - the simulator is right for the chip VAXes (including, I think,
V11) and wrong for MicroVAX I and probably the 8600, 780, 750, and 730.
# Conflicts:
# VAX/vax_cpu.c
- Recent changes in vax_watch.c changed the input parameter from a
physical address to a register address within the watch chip.
- vax630_sysdev.c called the older wtc_wr() with the new parameter,
but the length argument has been removed.
- The watch chip never starts as valid. Make it valid when the TODR is
attached (i.e. reflecting a connected battery).
- 64 bytes of bus addresses for the watch chip can sometimes be dispatched
to wtc_rd() and wtc_wr(). Make sure that reasonable memory is always
referenced for all potential accesses.
- restore vax8200 to makefile which got lost in a prior merge.
