Commit graph

4553 commits

Author SHA1 Message Date
David Gesswein
d9f2d39c56 PDP8: Fix missing clock pre-calibration instruction set due to typo 2024-02-01 12:55:07 -05:00
Mark Pizzolato
7a6a325580 ETHER: Make sure SET NOASYNC is effective for Ethernet devices
- Make sure that asynchronous mode can't be changed if devices using
   sim_ether are already attached.
- Add missing DEV_ETHER type flag for the only sim_ether using device
   that didn't already have it.
2024-02-01 12:54:53 -05:00
Patrick Linstruth
b273cac59e ALTAIRZ80: Fixes problem with MEM dump command
The MEM dump command would not display past SET CPU xK memory
size. This prevented displaying ROMs or other RAM windows when
a lower amount of memory was specified. This PR changes MEM to
always display a minimum of a 64K regardless of main RAM size.
2024-02-01 12:52:59 -05:00
Patrick Linstruth
3b4333dfcc ALTAIRZ80: Adds JAIR devices to simulator
Josh's Altair/IMSAI Replacement (JAIR) is a single board computer
(SBC) for the S100 bus. I created this device to assist a friend
with getting IMP and CBBS working on his JAIR. Without having a
JAIR myself, AltairZ80 to the rescue!

The following devices are added:

JAIR   - The main JAIR board I/O and ROM
JAIRS0 - Serial Port 0 (COM1)
JAIRS1 - Serial Port 1 (COM2)
JAIRP  - Parallel Port

This was a bit challenging because the JAIR uses an on-board SD
card with FAT file system to hold its BIOS and CP/M disk images.
The ATTACH command is used to mount SD card images to the
simulator. The simulator emulates the SD card interface for
read/writing SD card sectors. These images are easily mounted on
a Mac making moving files around easy. I do not know about Windows.
These same images can be written to an SD card and used with real
JAIR hardware, which may be useful for JAIR owners.

The serial and parallel ports fully support TMXR. Host serial ports
and sockets may be attached to these devices.

I am working on a GitHub repository containing an SD card image and
init script that will boot CP/M 2.2 on the JAIR simulator.

Is this device one that should be added to AltairZ80?
2024-02-01 12:52:41 -05:00
Patrick Linstruth
560f30d144 SCP: Adjust timer calibrations if SET THROTTLE x/t type is enabled
SCP doesn't initially adjust timer calibrations if SET THROTTLE x/t
type is enabled causing large delays in event dispatches. This PR
runs the timers through the same calibration adjustment loop as
other throttle types.
2024-02-01 12:52:24 -05:00
Patrick Linstruth
6925456d51 ALTAIRZ80: Add 1K RAM to SOL20 device
The Sol-20 provides 1K RAM at C800. This was discovered to be missing
when issuing a "SET CPU 24K" command. Without the CPU providing RAM
at C800, the Sol-20 would not function. This PR corrects the problem
by having the SOL20 device provide its own 1K RAM at C800.
2024-02-01 12:52:06 -05:00
B. Scott Michel
a275c71170 SCP: Reduce compiler warnings on LP64 platforms
(Note: Reducing compiler warnings across all, but primarily LP64
platforms, is a long term objective.)

Reduce compiler warnings on LP64 platforms (macOS, Windows) and 32-bit
builds (Win32). Prefer 'size_t' for pointer arithmetic, array indexing
and extents; 'int' hasn't been used for these purposes for many years
and across many ANSI standards. N.B. that conversions from int or int32
to size_t cause the compiler to zero-extend the value, which is
inefficient.

Refactor printf() format modifiers into sim_printf_fmts.h. Add the
SIZE_T_FMT modifier for better portability, especially on LP64 platforms
where size_t is unsigned long and sizeof(size_t) > sizeof(int).

3B2: Fix known size_t printf() format.
2024-02-01 12:51:32 -05:00
B. Scott Michel
d9d0e8bd74 CMake: Updates
Issue #294: "apple silicon build problem(s?)": If the "--flavor/-f" flag
is not specified on the command line, then complain loudly, print help
and exit. The script used to default to "Unix Makefiles".

Updates:

- Add missing "-DHAVE_LIBPNG" compiler command line define when the PNG
  library is detected/present for screen capture support.

- Add "clang64" to the list of MinGW64 platforms for which the
  .travis/deps.sh script can install build dependencies.

- Add PThread4W_FOUND to the condition that sets async I/O for Win32
  when using vcpkg for build dependencies.

- Add vs2022-x64, vs2019-x64 and vs2017-x64 build environments to
  build 64-bit Windows executables.

- Use simulator AIO only where needed by the simulator (i.e., the
  simulator calls/uses AIO_CHECK_EVENT in sim_instr())

  - Add "USES_AIO" flag to add_simulator() to mark a simulator that
    acutally uses asynchronous I/O.

  - Build "_aio" SIMH core library variants that have AIO turned on,
    link with the "_aio" variant when a simulator sets USES_AIO.

  - Emit a warning message when WITH_ASYNC is False (CMake configuration
    option) to notify the user/developer that some functionality will be
    crippled.

  Affected simulator builds: 3b2 family, PDP-6, PDP-11, VAX family,
  IMLAC and TT2500. The makefile and cmake/generate.py also updated
  to remain in sync with CMake.

  N.B.: Simulators still link with the underlying platform's threading
  library. SEL32 requires pthreads or equivalent threading library,
  independent of AIO.

- cmake/cmake-builder.sh

  - New "--no-aio" flag: Build simulators without async I/O.

  - New "--no-aio-intrinsics" flag: Don't build async I/O using compiler
    compare-exchange, atomic load intrinsics.

- cmake/cmake-builder.ps1

  - New "-noaio" flag: Build simulators without async I/O.

  - New "-noaiointrinsics" flag: Don't build async I/O using compiler
    compare-exchange, atomic load intrinsics.

CMake 3.28.1 INTERFACE_LINK_LIBRARIES behavior change: The file name
must now be an absolute path. Relative paths no longer accepted.
Internally, SIMH enforces this if CMAKE_VERSION >= 3.19, when REAL_PATH
was first implemented.
2024-02-01 12:51:13 -05:00
B. Scott Michel
f4c39a325c SCP: Add'l memory sanitization fixes
Initialize de-dup'ed debug line buffer:

  realloc(NULL, size) == malloc(size), which is uninitialized space.
  This causes the Clang memory sanitizer to detect an attempt to read
  uninitialized memory when debug_line_buf and debug_line_buf_last are
  different lengths. While the uninitialized space may never actually be
  compared, the memory sanitizer emits a strong hint to not do stupid.

  The sanitizer trips in the i650 simulator on the first memcmp(),
  debug_line_buf has 108 characters, debug_line_buf_last has 56
  characters (uninitialized space follows the 56 characters, tripping
  the sanitizer.)

  - memset() debug_line_buf and debug_line_buf_last to zero so that
    memcmp() will always gracefully return non-zero if somehow memcmp()
    ends up going past the end of either buffer.  Should never happen in
    practice, but theory always gets mugged by reality.

  - Keep track of debug_line_buf_last's comparison length (i.e., up to
    the '\r') and only execute memcmp() when this length equals the
    current debug_line_buf comparison length (end - endprefix + 1).

  - Added a log deduplication test to "testlib" command to ensure that
    nothing broke as a result of this fix.

Network ACL check in sim_addr_acl_check:

  The memory sanitizer found an off-by-one bug in sim_addr_acl_check
  while executing "testlib". This makes CIDR network ACLs functional,
  e.g., "127.0.0.1/32" is interpreted properly and the associated
  "testlib" test passes.
2024-02-01 12:50:52 -05:00
Paul Koning
c077c22d24 PDP11: fix disassembly of reg,src instructions
This corrects the disassembly of MUL, DIV, ASH, and ASHC so it works
correctly when the register is not R0.
2023-12-18 14:33:06 -05:00
B. Scott Michel
625b9e8d45 CMAKE: Python distutils obsoleted.
Python 3.12 will not have the distutils package in the standard library.
The TextFile class is particularly useful when reading [Mm]akefiles, and
recreating its functionality would be painful.

Stash a local copy of the last version of distutils.text_file.py and use
it. Do not rely on distutils being present or installed.
2023-11-28 09:51:29 -05:00
Tony Lawrence
dd49f851a4 PDP11: RP11: Remove duplicate checks (now only done in svc routine) 2023-11-28 09:51:01 -05:00
Lars Brinkhoff
7797344bf9 PDP11, VAX, KS10: Speed up Chaosnet polling when there is traffic. 2023-11-28 09:49:35 -05:00
Lars Brinkhoff
1ed26cfb0e KS10: Make Chaosnet work. 2023-11-28 09:49:35 -05:00
Tony Lawrence
47cf74ac4b PDP11: TA11/TU60 fix identification 2023-11-28 09:48:36 -05:00
B. Scott Michel
b3465af64e CMake: cmake-builder.sh "-c" takes an argument 2023-11-28 09:47:36 -05:00
B. Scott Michel
dfda031f23 CMake: Multiple targets, clean cache
Two updates suggested by Paul Koning:

- Enable building multiple simulator targets using a comma-separated list,
  e.g.: pdp8,pdp11,3b2

- Unconditionally clean CMake's cache each time the script is invoked.
  This eliminates confusing CMake configuration messages when CMake
  changes or updates, and CMake policies change.

  The most recent policy change was IMPORT_LOCATION, which is now
  mandatory for interface libraries. An old CMake configuration cache
  doesn't reflect the import library IMPORT_LOCATION property, which
  caused confusing warning messages. The cure is removing the old cache
  and reconfiguring.
2023-11-28 09:47:36 -05:00
Paul Koning
cc76d9a70d
Update README.md
Add Coverity scan status badge
2023-11-27 10:55:16 -05:00
Christian Gauger-Cosgrove
2396fd0349 PDP-11, VAX: Expand DTYPE mask size, fix RF35, add new devices to RQ sim
The disk type mask width (UNIT_W_DTYPE) was increased to six (6) bits, doubling
the possible number of disk types definable to sixty-four (64).
The RF35 was not entered in either the drv_tab or drv_types tables, causing any
set command issued for the drive type defined after the RF35 -- the RF71 through
RF73, as well as any disk defined after the RF73 -- to act incorrectly.
The ESE20 solid state disk and ESE50 series of solid state disks are
added based on simple drive geometry and size information without any parameters
for bad block management (not that it is used in the simulation anyways). The
ESE50 series drives are labelled as they are in the MSCP specification document,
the Ultrix-32 v4.5 disktab, and the Media Type noted in the "ESE50 SDI Solid
State Disk User Guide" (EK-ESE50-UG.B01):
 * ESE50-A: ESE52
 * ESE50-B: ESE56
 * ESE50-D: ESE58
The RD33 is added based on the geometry of the Microscience HH-1090 hard disk
drive, with the bad block management information calculated from the bad block
information for the other RDxx series drives.
The RX18 is added based on the geometry of the RX180 floppies in the VT-180
"Robin" CP/M system, which are noted in the MSCP specification document as a
possible device. Specific information is taken from the "VT-180 Series Technical
Manual" (EK-VT18X-TM-001).
2023-11-21 16:26:52 -05:00
Tony Lawrence
b23cde9c5d DISK: Do not allow to emit any "footers"
This is the initial iteration of cleaning up simh of appending the
"footers" to disk images:  it does not allow to emit any new "footers",
yet it does not change the behavior as to how any existing "footers"
are treated internally.  Also, even though sim_disk.c currently builds
the "footer" for any attached disk container, with this patch, it is
only kept in-memory, and never gets written to (appended / updated)
the actual container.
2023-10-24 16:26:26 -04:00
B. Scott Michel
c57f925256 SCP: Move .git-commit-id.h to where used
Move .git-commit-id.h include to where it's actually referenced in
scp.c to reduce the recompile overhead for build systems that track
build dependencies.

Ensure that headers that reference SIM_MAJOR include sim_rev.h as a
defensive coding practice.

Net effect: Reduces recompiled source to a minimum when .git-commit-id.h
is updated and removes the sim_defs.h > sim_rev.h > .git-commit-id.h
dependency subgraph. Everything includes sim_defs.h, so a change to
.git-commit-id.h causes a large recompile, vice what should just be a
scp.c recompile and simulator suite relink.

Does not impact makefile builds, since makefile builds will recompile
everything; dependency tracking is superfluous.
2023-10-24 12:48:38 -04:00
B. Scott Michel
06d41835fe CMake: Win XP (v141_xp) VS install script
Move the PowerShell code from .github/workflow/cmake-builds.yml into its
own script, cmake/github_v141_xp.ps1, to keep cmake-buils.yml readable.
The script also facilitates synchronizng with the Chocolatey installer's
Wait-VSIstallerProcesses function easier (from which this this code is
derived.)

cmake-builds.yml: Check the output from Get-VSSetupInstance and
Set-VSSetupInstance. Empty (or null) output indicates that the v141_xp
install did not complete successfully. Build process will bail when that
happens.

cmake/v141_xp_install.ps1: Unused and now unnecessary script.
2023-10-24 12:46:51 -04:00
Tony Lawrence
eeebbed273 PDP11: RP11: Implement delayed CS_DONE for "initiation" commands (SEEK/HOME)
Running earlier XXDP tests revealed that a technique of concurrent command
initiation and continued housekeeping for the command completion was used in
the old code.

For example, code could initiate a SEEK command for a drive, and knowing that
CS_DONE (and thus, an interrupt) is coming in about 16us, it would then go
ahead and clear a flag, which registers that the interrupt has occurred
(expected to be set to 1 by the ISR).  If CS_DONE is set by the implementation
at the function initiation immediately, that would mean that the interrupt
could be triggered before the next instruction, and the flag would be set by
the ISR right away.  The main code, however, would proceed with the the flag
clear as the following instruction, thus, never detecting the interrupt down
the road.

Since this technique was in existence, it is better to introduce a delay for
setting CS_DONE in the "fast" initiation commands like SEEK and HOME, to
accommodate the software that was relying on it.

So far, however, no issues were encountered in testing (except one), where
this delay mattered, but it's hard to tell if it would not be needed at all.

All I/O commands always delay CS_DONE already because they were never supposed
to be immediate.

Since the time for CS_DONE in initiation commands was documented at 16us, the
introduced delay is set to 10 instructions, which usually took more than that
to execute.  But the interrupt flag clear case would be covered, as well as
the counted waits, which used some 25+-iteration tight loops for "drive ready",
before flagging a time-out (so the delay cannot be longer, either).

It also looks like more modern code never used any such tricks, so for it, it
should not matter if CS_DONE was slightly delayed or not.
2023-10-24 12:45:59 -04:00
Tony Lawrence
28354d99dc MAKEFILE: Use correct links to open-simh repo 2023-10-24 12:42:43 -04:00
Tony Lawrence
b88cd40771 SCP: SOCK: Increase backlog in the listen() syscall
The currently used backlog of (1) effectively disables any two or more
simultanueously incoming connections at the kernel level, because the
backlog parameter only allows 1 such connection.  Yet since terminal
multiplexers can handle tens of clients, it's not technically impossible to
have more than one incoming request to be received at any particular moment
(for two different "lines").  A reasonable backlog of more than 1 safeguards
that the "extra" connections won't be refused outright, and postpones that
decision to be made by simh (not the kernel) -- for example, when, say, all
multiplexer lines are busy, with an explanation (which states so) rather than
just the infamous "Connection reset by peer" (effected by the kernel reset).

This patch increases the backlog to 64.
2023-10-24 12:42:09 -04:00
B. Scott Michel
737b135809 Remove files symlinked to /Library
Clean up /usr/local/bin symlinks to /Library that prevents "brew update"
from succeeding.
2023-10-23 09:07:57 -07:00
Tony Lawrence
f75592c5b8 PDP11: 11/70 read-only registers must not return NXM on write
17 777 740 - 17 777 742, read-only error address registers,
and 17 777 764, a read-only System ID register,

and are not handled in the CPU70_wr() routine, which means for these
addresses the routine returns NXM, which then translates to "bus timeout"
(no response to address), and then, as a result, trap to vector 4.

That is incorrect, IMO.

These locations are read-only yet the address gets decoded, and even
though writing does not have any effect, the write routine for these
addresses should return SCPE_OK.
2023-10-10 19:52:41 -04:00
Tony Lawrence
090ed215de PDP11: RP11: Major update after XXDP
Having run the device code thru XXDP and some other OS's and scenarios
rigorously, a bunch of discrepancies were found, which need to be addressed
by this rather extensive patch.

1. Each unit must implement its own "drive status" register, to be able to
   track per-drive errors / conditions correctly;
2. Fixed INT_SET() / INT_CLR() in RPCS write function (wrong order of the "if"
   conditions);
3. Some behavior was implemented not exactly how it was expected from the real
   hardware, such as:
   a. Post-I/O register values in RPDA and RPCA (including the corner case of
      pack overflow);
   b. I/O stacking, which wasn't mentioned in any available documentation, but
      only XXDP listings;
   c. RESET/IDLE function must be accepted for a "busy" controller;
   d. HOME function must always execute, even when "device ready" is not set
      (e.g. when SEEK error detected);
   e. SEEK incomplete should not respond with "device ready" (however, the
      condition can be cleared by HOME, d.);
   f. WLOA-induced write-lock violation wasn't reflected in "device status".
4. Some timing was off so that the device worked "too fast" -- this was fixed
   (except for the pathological cases when the races are in the actual test
   code, and cannot be logically fixed);
5. WLOA setup command bug was fixed;
6. Added more code comments found per the above peculiarities.
2023-10-10 14:10:50 -04:00
Tony Lawrence
5fba1e75e7 PDP11: TS11: Fix help output for BOOT command 2023-10-10 13:02:02 -04:00
Jim Bevier
25b79339fd SEL32: Do general code cleanup to remove unused code.
SEL32: Update Ping and ICMP support code to use correct packet size.
SEL32: Update SetupNet script to support latest Fedora release.
SEL32: Improve disk write speed.
SEL32: Add .tap file reassignent support in sel32_mt.c.
2023-10-09 20:34:56 -04:00
Richard Cornwell
8b9613ae81 KA10: Fixed OWGBP on KL10B. 2023-10-09 20:27:43 -04:00
Richard Cornwell
9141eea016 KA10: Allow single step over XCT, byte and extend instructions. 2023-10-09 20:27:43 -04:00
Richard Cornwell
f247a0ca1f KA10: Add -m option to load .exe files to load monitors. 2023-10-09 20:27:43 -04:00
Richard Cornwell
3da3de331e KA10: Fixed nopage read/write to always refer to memory. 2023-10-09 20:27:43 -04:00
Richard Cornwell
19c6b30e8e KA10: Moved over older changed to ITS and WAITS devices. 2023-10-09 20:27:43 -04:00
Richard Cornwell
0c77f8c832 KA10: Fixed depositing symbolic into register and symbolic of reg 17 2023-10-09 20:27:42 -04:00
Richard Cornwell
73918ddc12 KA10: Fixed PUSH for extended addressing on KL. 2023-10-09 20:27:42 -04:00
Richard Cornwell
fe0bc2ee14 KA10: Fixed to allow EDDT to work correctly on KL10. 2023-10-09 20:27:42 -04:00
Richard Cornwell
f8a51de903 KA10: Fixed save command on Tops 10 7.0x. 2023-10-09 20:27:42 -04:00
Richard Cornwell
9c2c1117e8 SIM_CARD: Fixed to better detect mixed binary and ascii decks. 2023-10-09 20:27:42 -04:00
Tony Lawrence
c3f55fc692 SCP: Fix correctly loading simh.ini when user HOME not defined 2023-10-09 20:18:05 -04:00
Derek Peschel
cc97971dc9 TX-0: Make ^E work in readin mode.
sim_instr does not completely follow the outline in the SIMH v3
developer docs. It does not decrease sim_interval in readin mode.
Fixing this, I cleaned up some other things:

- Move the decrease of sim_interval to after the check for breakpoints,
  but before the check for ios. This ensures that sim_interval will
  decrease any time an instruction executes in normal mode, or readin
  mode executes, or ios is set and the CPU is waiting for ios to clear.
  (Except the CPU should be clearing ios itself, not waiting for ios to
  clear, but that fix requires a complete redesign of the I/O routines
  and belongs in another branch.)
- Correctly handle all four combinations of mod_tst and mod_rdin.
- When changing from readin mode to normal mode, if cpu_set_mode returns
  an error, stop with the same error. If cpu_set_mode returns SCPE_OK,
  either stop or continue execution, depending on the word read from tape.
- In petr_boot and in the readin mode code in sim_instr, if the
  PETR is not attached to a file, return SCPE_UNATT. Never try to read
  from an unattached unit; I believe this reads standard input and
  prevents ^E from working.

Overall control structure inside the while (reason == 0) loop:

- When stopping due to an error, break out of the while loop where
  possible.
- After handling "ios is set", continue, don't run readin/test/normal-
  mode code.
- After handling one readin operation, if the code didn't break out
  of the while loop, continue, don't run normal-mode code.
2023-10-09 20:17:13 -04:00
Derek Peschel
6474252ed4 Stop ptp_svc from setting the ios bit; sim_instr never clears it and simulation loops.
The CPU-to-device routines and device service routines need a redesign.
In the meantime, this quick patch makes tape punching possible.
2023-10-09 20:16:38 -04:00
Derek Peschel
0ca09194fa Before, when the simulator decoded pad, it handled pad without cry
and pad with cry. When it decoded cry, it printed a "TO DO" message.

http://bitsavers.org/pdf/mit/tx-0/memos/M-5001-19_macros_Apr60.pdf
derives a simple algorithm for cry. Implement that, remove the test
for cry from the pad code, and reformat the debug messages.

The same change appears in sim_instr and sim_opr_orig.
2023-10-09 20:16:20 -04:00
Tony Lawrence
dc69862bc8 PDP11: RF11: Fix DAE computation in service routine 2023-10-09 20:16:01 -04:00
Howard Bussey
8ee2b90dc4 Fix apple silicon build problems Issue #294
- find gnu-getopt when installed by homebrew in /opt
- invoke realpath only on known path components
  (needed for some realpath implementation(s))
  (relevant when build-flavor directory does not yet exist)
2023-10-09 20:15:32 -04:00
Patrick Linstruth
90e4597aa9 AltairZ80: M2SIO, CPU, SIO and PMMI additions and fixes
Adds 6850 DCD status latch to M2SIO devices.
Adds vector interrupt support to M2SIO devices.

Removes CTS inactive transmit disable from PMMI device.

Adds IMSAI-style programmed output to CPU/SIO devices.

SET CPU PO will display "PO: AREG" upon an "OUT 0FFH"
instruction.

SET CPU NOPO will disable the function (default).

Corrects problem with Mode 0 interrupts.

When the CPU receives an interrupt, it pushes the current
program counter on the stack. The current implementation
of Mode 0 was performing interrupt processing after fetching
the next opcode from RAM, which also increases the PC by 1.
This caused PC+1 to be pushed on the stack. The interrupt
processing is now done prior to fetching the next opcode,
preserving the correct program counter.
2023-10-09 20:14:51 -04:00
Tony Lawrence
5407544728 PDP11: RP11-C (RP02/03) disk implementation 2023-09-23 23:42:26 -04:00
Tony Lawrence
645ea51ce1 PDP11: RP11-C (RP02/03) disk implementation 2023-09-22 19:53:27 -04:00
Tony Lawrence
a8c5f7c88b PDP11: RP11-C (RP02/03) disk implementation 2023-09-22 19:41:33 -04:00