A device simulator is responsible for specifying exactly what categories of
packets it wants to receive. It should do that after having opened the device.
This change avoids collecting packets that aren't actually interesting until
after the device designates which packets it is interested in.
- Limit choices to explicitly either G-FLOAT or D-FLOAT for SET CPU INST=
- Compile in all instruction implementations and dynamically use the
enabled ones.
- Different VAX models had different groups of instructions which were
implemented in hardware vs trappng to the OS for emulation. Functionality
has been added to differentiate the various mix of instruction groups for
different models and to display both the groups and the actual instructions.
- Visibility to Instruction groups is provided by SHOW CPU INSTRUCTIONS
and the list of the active instructions implemented and emulated via
SHOW CPU -V INSTRUCTIONS.
- The MicroVAX I CPU handled some execution fault conditions differently
from other VAX systems these differences are now specifically handled.
- Add build time test support to MicroVAX I running EHKAA v1.13
suggested in #683
- Add more CPU debug details relating to exception and interrupt processing
Previously, the NI ethernet device expected to do all
autoconfiguration at attach time. Furthermore, if attaching failed for
some reason (e.g., permission issues on a tap device, etc.) the card
would be left autoconfigured, but in a broken state that could lead to
reading uninitialized memory.
This change fixes those bugs, and allows the device to be attached and
detached more freely. The card is now autoconfigured when it is
enabled. Attaching and detaching are analogous to connecting or
disconnecting an ethernet transceiver from the physical device.
Originally, the VAX allowed immediate operands (8F) to be used without
restrictions in address mode instructions, either standalone or indexed.
Starting with MicroVAX II, immediate indexed became reserved. This
remained true for all subsequent chip implementations. The SRM was
ECOed in March, 1985 to make immediate indexed unpredictable.
In MicroVAX II, immediate g-floating operands didn't work correctly. The
problem was found a couple of months after tape-out. While the index
flows could be fixed, and were fixed according to the microcode revision
history:
; 7-May-84 [RMS] Fixed FD problem in index flows (JLR)
the problem in indexed immediate could only be fixed by a significant
hardware change in an area that was already packed full. The VAX
Architecture Team, which had always been very sympathetic to the
VAX chip efforts, proposed a much simpler solution: make immediate
indexed unpredictable. It was useless, in any case.
I'm rather surprised that this wasn't flagged by the 780 diagnostics.
Maybe it was never tested. It was tested in HCORE (the original MicroVAX I
core diagnostic that is failing), but I removed it subsequently:
; 8-may-85 rms removed indexed immediate tests
Bottom line - the simulator is right for the chip VAXes (including, I think,
V11) and wrong for MicroVAX I and probably the 8600, 780, 750, and 730.
# Conflicts:
# VAX/vax_cpu.c
- Recent changes in vax_watch.c changed the input parameter from a
physical address to a register address within the watch chip.
- vax630_sysdev.c called the older wtc_wr() with the new parameter,
but the length argument has been removed.
- The watch chip never starts as valid. Make it valid when the TODR is
attached (i.e. reflecting a connected battery).
- 64 bytes of bus addresses for the watch chip can sometimes be dispatched
to wtc_rd() and wtc_wr(). Make sure that reasonable memory is always
referenced for all potential accesses.
- restore vax8200 to makefile which got lost in a prior merge.
