folkert van heusden
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e93220c536
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removed debug code
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2022-06-11 08:47:31 +02:00 |
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folkert van heusden
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2d7f202530
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use of iterate after erase
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2022-06-11 08:47:24 +02:00 |
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folkert van heusden
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8b899a65d3
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removed obsolete code
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2022-06-11 08:39:35 +02:00 |
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folkert van heusden
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7c574f805f
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meta
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2022-06-11 08:37:05 +02:00 |
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folkert van heusden
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3cd9051824
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running flag tweak
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2022-06-11 08:31:22 +02:00 |
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folkert van heusden
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c85f6cbf7e
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reduce number of context switches
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2022-06-11 08:31:06 +02:00 |
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folkert van heusden
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b39beacc40
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RL02 for ESP32
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2022-06-11 08:16:16 +02:00 |
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folkert van heusden
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ce7343075f
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moved file-loaders into loaders.cpp/h
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2022-06-11 08:05:19 +02:00 |
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folkert van heusden
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18cfbaf2d3
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ESP32 compile fixes
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2022-06-10 21:08:06 +02:00 |
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folkert van heusden
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8d8af7153b
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Event handling (stop/interrupt) clean-up
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2022-06-10 20:59:36 +02:00 |
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folkert van heusden
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f6824ececf
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Merge branch 'rl'
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2022-06-10 20:30:51 +02:00 |
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folkert van heusden
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ee8d772426
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MFPI/MTPI require special handling for SP
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2022-06-10 20:30:18 +02:00 |
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folkert van heusden
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eb96e71592
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MFPI/MTPI require special handling for SP
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2022-06-10 20:30:00 +02:00 |
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folkert van heusden
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1d969dfb00
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p11 .x11 test files loader
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2022-06-10 19:54:10 +02:00 |
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folkert van heusden
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57aca63db0
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Implemented RL02 read command
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2022-06-10 09:48:02 +02:00 |
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folkert van heusden
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160ffe5c26
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connect rl02 to bus
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2022-06-09 22:19:46 +02:00 |
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folkert van heusden
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21a6553f47
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framework for RL02 emulation
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2022-06-09 22:07:45 +02:00 |
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folkert van heusden
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be4fbdc4ec
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remove stray debug code
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2022-06-09 21:08:02 +02:00 |
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folkert van heusden
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b60debfd22
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show speed at exit in fast emulation
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2022-06-09 21:06:27 +02:00 |
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folkert van heusden
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04d9c89b3b
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log lines of tty-output in debug-log
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2022-06-09 21:05:51 +02:00 |
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folkert van heusden
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11fc6c5d86
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handle backspace & ^u
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2022-06-09 19:20:32 +02:00 |
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folkert van heusden
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94181e94bd
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KW11-L
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2022-06-09 19:10:22 +02:00 |
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folkert van heusden
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3466cefbed
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MUL: clear V-flag and correct setting of result in registers
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2022-06-09 14:46:20 +02:00 |
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folkert van heusden
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bb6e599813
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HI/LO were swapped for MUL
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2022-06-09 14:02:49 +02:00 |
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folkert van heusden
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8e6eae64da
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instructions with two registers to work on are R[nr] and R[nr | 1] (not + 1)
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2022-06-09 12:39:52 +02:00 |
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folkert van heusden
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f4b7f0a3cd
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fix for ASHC on negative value
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2022-06-09 09:46:20 +02:00 |
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folkert van heusden
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d243364743
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ASHC: set V flag, correction for shift value
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2022-06-09 08:48:30 +02:00 |
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folkert van heusden
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23a87309e3
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strace -> start tracing from address
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2022-06-09 08:47:54 +02:00 |
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folkert van heusden
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73be8514ba
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toggle tracing (debugger)
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2022-06-08 22:17:28 +02:00 |
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folkert van heusden
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5770bdc263
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ASH now bug-free?
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2022-06-08 22:09:11 +02:00 |
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folkert van heusden
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782095555d
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ASH fixes
- lower 6 bit are addressing mode + register number
- fix for sign-bit extension
To do: flags
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2022-06-03 18:46:04 +02:00 |
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folkert van heusden
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649516df18
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MARK versus MTPS
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2022-06-03 11:48:06 +02:00 |
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folkert van heusden
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1e748d3d37
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All write-access to 0177776 should not affect the flag registers
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2022-06-02 22:22:05 +02:00 |
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folkert van heusden
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5a77604127
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MOV(B) to 0177776 should not set the flags
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2022-06-02 21:42:55 +02:00 |
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folkert van heusden
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2268d7c9f7
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examine/e command
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2022-06-02 21:26:33 +02:00 |
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folkert van heusden
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c8e77ff092
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meta
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2022-06-01 15:40:07 +02:00 |
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folkert van heusden
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cb8d3d18a3
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-b to enable bootloader (help)
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2022-06-01 13:32:52 +02:00 |
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folkert van heusden
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3df8aea12c
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Split 'step()' into _a and _b so to prevent confusing disassembly of an
instruction that won't be executed anyway due to an interrupt/trap.
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2022-04-30 12:16:19 +02:00 |
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folkert van heusden
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fbf68e2409
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allow rk05 without bootloader set
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2022-04-30 12:09:20 +02:00 |
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folkert van heusden
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d259fa7755
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formatstring
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2022-04-29 21:52:41 +02:00 |
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folkert van heusden
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5a4057f6a1
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trap: always register deltas unless error set in MMR0
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2022-04-14 17:50:18 +02:00 |
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folkert van heusden
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1673548c37
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MMR1/2
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2022-04-13 23:38:46 +02:00 |
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folkert van heusden
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87e181a8e2
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MMR0
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2022-04-13 21:22:09 +02:00 |
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folkert van heusden
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a90547c3d1
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micro-opt
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2022-04-13 20:53:54 +02:00 |
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folkert van heusden
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54b9ac8eae
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compile fix
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2022-04-13 17:52:13 +02:00 |
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folkert van heusden
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1d23b5f5bc
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page modes / debugger tweaks
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2022-04-13 17:49:15 +02:00 |
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folkert van heusden
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841d0d9720
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RESET clears the interrupt-queue
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2022-04-13 17:48:49 +02:00 |
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folkert van heusden
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4bf488212b
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console switches: debug-mode in -d
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2022-04-13 11:18:56 +02:00 |
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folkert van heusden
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b8c7d78ed6
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cleaner implementation of cpu::getBitPSW
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2022-04-12 22:10:45 +02:00 |
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folkert van heusden
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439c34abab
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ESP32: reboot whole ESP32 at when invoking reset
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2022-04-12 22:04:26 +02:00 |
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