folkert van heusden
|
18cfbaf2d3
|
ESP32 compile fixes
|
2022-06-10 21:08:06 +02:00 |
|
folkert van heusden
|
8d8af7153b
|
Event handling (stop/interrupt) clean-up
|
2022-06-10 20:59:36 +02:00 |
|
folkert van heusden
|
f6824ececf
|
Merge branch 'rl'
|
2022-06-10 20:30:51 +02:00 |
|
folkert van heusden
|
ee8d772426
|
MFPI/MTPI require special handling for SP
|
2022-06-10 20:30:18 +02:00 |
|
folkert van heusden
|
eb96e71592
|
MFPI/MTPI require special handling for SP
|
2022-06-10 20:30:00 +02:00 |
|
folkert van heusden
|
1d969dfb00
|
p11 .x11 test files loader
|
2022-06-10 19:54:10 +02:00 |
|
folkert van heusden
|
57aca63db0
|
Implemented RL02 read command
|
2022-06-10 09:48:02 +02:00 |
|
folkert van heusden
|
160ffe5c26
|
connect rl02 to bus
|
2022-06-09 22:19:46 +02:00 |
|
folkert van heusden
|
21a6553f47
|
framework for RL02 emulation
|
2022-06-09 22:07:45 +02:00 |
|
folkert van heusden
|
be4fbdc4ec
|
remove stray debug code
|
2022-06-09 21:08:02 +02:00 |
|
folkert van heusden
|
b60debfd22
|
show speed at exit in fast emulation
|
2022-06-09 21:06:27 +02:00 |
|
folkert van heusden
|
04d9c89b3b
|
log lines of tty-output in debug-log
|
2022-06-09 21:05:51 +02:00 |
|
folkert van heusden
|
11fc6c5d86
|
handle backspace & ^u
|
2022-06-09 19:20:32 +02:00 |
|
folkert van heusden
|
94181e94bd
|
KW11-L
|
2022-06-09 19:10:22 +02:00 |
|
folkert van heusden
|
3466cefbed
|
MUL: clear V-flag and correct setting of result in registers
|
2022-06-09 14:46:20 +02:00 |
|
folkert van heusden
|
bb6e599813
|
HI/LO were swapped for MUL
|
2022-06-09 14:02:49 +02:00 |
|
folkert van heusden
|
8e6eae64da
|
instructions with two registers to work on are R[nr] and R[nr | 1] (not + 1)
|
2022-06-09 12:39:52 +02:00 |
|
folkert van heusden
|
f4b7f0a3cd
|
fix for ASHC on negative value
|
2022-06-09 09:46:20 +02:00 |
|
folkert van heusden
|
d243364743
|
ASHC: set V flag, correction for shift value
|
2022-06-09 08:48:30 +02:00 |
|
folkert van heusden
|
23a87309e3
|
strace -> start tracing from address
|
2022-06-09 08:47:54 +02:00 |
|
folkert van heusden
|
73be8514ba
|
toggle tracing (debugger)
|
2022-06-08 22:17:28 +02:00 |
|
folkert van heusden
|
5770bdc263
|
ASH now bug-free?
|
2022-06-08 22:09:11 +02:00 |
|
folkert van heusden
|
782095555d
|
ASH fixes
- lower 6 bit are addressing mode + register number
- fix for sign-bit extension
To do: flags
|
2022-06-03 18:46:04 +02:00 |
|
folkert van heusden
|
649516df18
|
MARK versus MTPS
|
2022-06-03 11:48:06 +02:00 |
|
folkert van heusden
|
1e748d3d37
|
All write-access to 0177776 should not affect the flag registers
|
2022-06-02 22:22:05 +02:00 |
|
folkert van heusden
|
5a77604127
|
MOV(B) to 0177776 should not set the flags
|
2022-06-02 21:42:55 +02:00 |
|
folkert van heusden
|
2268d7c9f7
|
examine/e command
|
2022-06-02 21:26:33 +02:00 |
|
folkert van heusden
|
c8e77ff092
|
meta
|
2022-06-01 15:40:07 +02:00 |
|
folkert van heusden
|
cb8d3d18a3
|
-b to enable bootloader (help)
|
2022-06-01 13:32:52 +02:00 |
|
folkert van heusden
|
3df8aea12c
|
Split 'step()' into _a and _b so to prevent confusing disassembly of an
instruction that won't be executed anyway due to an interrupt/trap.
|
2022-04-30 12:16:19 +02:00 |
|
folkert van heusden
|
fbf68e2409
|
allow rk05 without bootloader set
|
2022-04-30 12:09:20 +02:00 |
|
folkert van heusden
|
d259fa7755
|
formatstring
|
2022-04-29 21:52:41 +02:00 |
|
folkert van heusden
|
5a4057f6a1
|
trap: always register deltas unless error set in MMR0
|
2022-04-14 17:50:18 +02:00 |
|
folkert van heusden
|
1673548c37
|
MMR1/2
|
2022-04-13 23:38:46 +02:00 |
|
folkert van heusden
|
87e181a8e2
|
MMR0
|
2022-04-13 21:22:09 +02:00 |
|
folkert van heusden
|
a90547c3d1
|
micro-opt
|
2022-04-13 20:53:54 +02:00 |
|
folkert van heusden
|
54b9ac8eae
|
compile fix
|
2022-04-13 17:52:13 +02:00 |
|
folkert van heusden
|
1d23b5f5bc
|
page modes / debugger tweaks
|
2022-04-13 17:49:15 +02:00 |
|
folkert van heusden
|
841d0d9720
|
RESET clears the interrupt-queue
|
2022-04-13 17:48:49 +02:00 |
|
folkert van heusden
|
4bf488212b
|
console switches: debug-mode in -d
|
2022-04-13 11:18:56 +02:00 |
|
folkert van heusden
|
b8c7d78ed6
|
cleaner implementation of cpu::getBitPSW
|
2022-04-12 22:10:45 +02:00 |
|
folkert van heusden
|
439c34abab
|
ESP32: reboot whole ESP32 at when invoking reset
|
2022-04-12 22:04:26 +02:00 |
|
folkert van heusden
|
e5dd0105af
|
flag handling
|
2022-04-12 21:02:02 +02:00 |
|
folkertvanheusden
|
50e9905415
|
Merge pull request #4 from folkertvanheusden/debugger
Debugger
|
2022-04-12 16:15:28 +02:00 |
|
folkert van heusden
|
fe63649209
|
Merge branch 'master' into debugger
|
2022-04-12 16:00:55 +02:00 |
|
folkert van heusden
|
fbee770225
|
RTI/RTT fix (prev mode)
|
2022-04-12 15:58:37 +02:00 |
|
folkert van heusden
|
5390e54107
|
tracing: make sure a trap is logged
|
2022-04-12 12:31:22 +02:00 |
|
folkert van heusden
|
0ffb8ab7c4
|
disassemble: for first line show registers
|
2022-04-12 11:21:59 +02:00 |
|
folkert van heusden
|
44ad6a5912
|
emulation speed
|
2022-04-12 11:17:30 +02:00 |
|
folkert van heusden
|
39952ef68b
|
debugger in ESP32
|
2022-04-12 11:08:47 +02:00 |
|