Neil Webber
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4e92326323
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optimize register-direct paths for ADD and CMP, more could be done. Signif speedups for the optimized cases
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2024-05-17 12:04:05 -05:00 |
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Neil Webber
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715ff48d22
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optimize TST on register direct
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2024-05-17 12:03:09 -05:00 |
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Neil Webber
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6da0df526d
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tstb decb
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2024-05-17 12:02:43 -05:00 |
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Neil Webber
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156972e88f
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Squeeze another 1% out of reg-reg mov
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2024-05-17 11:26:12 -05:00 |
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Neil Webber
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0a5b2b8a69
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some optimizations for >5% increaase in register ops
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2024-05-16 15:55:05 -05:00 |
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Neil Webber
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379aeca487
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add test for (user mode) PC wrap-around
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2024-05-16 15:41:28 -05:00 |
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Neil Webber
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4651d137f7
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HALT in user mode is ReservedInst, not AddressError
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2024-05-16 15:39:44 -05:00 |
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Neil Webber
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d0de30614f
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minor editorial fixes
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2024-05-15 22:17:22 -05:00 |
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Neil Webber
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02f55397f8
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minor perf improvement for byte writes in operandx (validated with timeit)
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2024-05-14 09:04:38 -05:00 |
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Neil Webber
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837c691fdc
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added MUL test
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2024-05-13 12:40:38 -05:00 |
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Neil Webber
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6b3b41a0c8
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Make sure HALT_SEQUENCE works even if only one byte
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2024-05-12 04:17:25 -05:00 |
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Neil Webber
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5a1558c3d7
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Updates for stdin mode
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2024-05-11 17:06:11 -05:00 |
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Neil Webber
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3d8ec4a4bf
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cleanup
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2024-05-11 16:18:28 -05:00 |
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Neil Webber
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9171cd5df1
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Implement stdin mode (vs socket) and halt toggle capability (stdin only)
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2024-05-11 16:18:17 -05:00 |
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Neil Webber
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d33ea43bd7
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implement halt toggle
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2024-05-11 16:17:44 -05:00 |
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Neil Webber
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8b55fe047d
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This entire module probably needs refactoring, it's getting a bit messy especially regarding messages. That said .. implement ability to select use_stdin for console emulation
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2024-05-11 16:16:57 -05:00 |
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Neil Webber
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aeefc45355
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Provide option to send telnet initialization sequences to console
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2024-05-09 10:26:26 -05:00 |
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Neil Webber
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f278e18b89
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SIMH allows -(PC) addressing mode, therefore, so do we
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2024-05-08 20:37:57 -05:00 |
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Neil Webber
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d1e040dce8
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test_trapconditions to verify various illegal sequences generate correct trap vectors (MORE TESTS NEEDED HERE)
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2024-05-08 20:17:19 -05:00 |
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Neil Webber
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932fbd9ae2
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Add tests for LDA with/without checksum on END block
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2024-05-08 18:00:27 -05:00 |
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Neil Webber
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9428e4744a
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Verifying with some test code, SIMH generates ReservedInstruction for things like JMP R0 ... and now this code does the same (was AddressError)
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2024-05-08 17:59:35 -05:00 |
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Neil Webber
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625c5ce1cc
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Allow for no checksum in END block of an LDA file
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2024-05-08 17:58:38 -05:00 |
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Neil Webber
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53d7c5d7ab
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Fix for typeerror #21 -- though this also points out re-reading what MMR2 points to (for logging) might be a bad idea
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2024-05-08 08:40:13 -05:00 |
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Neil Webber
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9442b70617
|
implement write lock
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2024-05-04 13:59:48 -05:00 |
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Neil Webber
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fed836b5b3
|
v5 instructions
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2024-05-03 10:41:19 -05:00 |
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Neil Webber
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3f5126c398
|
generalize boot messages
|
2024-05-03 10:22:03 -05:00 |
|
Neil Webber
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fb71067946
|
first go at making rk unix bootable
|
2024-05-03 07:50:11 -05:00 |
|
Neil Webber
|
9434ea843e
|
Working well enough to boot unix5
|
2024-05-03 07:49:49 -05:00 |
|
Neil Webber
|
c4f9423a4c
|
clean up
|
2024-05-03 07:48:18 -05:00 |
|
Neil Webber
|
87dff94cd3
|
Add readonly support and illegal_cycle convenience
|
2024-05-03 07:46:33 -05:00 |
|
Neil Webber
|
b3b834c0fb
|
cleanup breakpoint inits
|
2024-05-03 07:44:37 -05:00 |
|
Neil Webber
|
98510af5e7
|
minor cleanups
|
2024-05-02 09:16:16 -05:00 |
|
Neil Webber
|
0c6256571a
|
cleanup
|
2024-04-23 13:19:34 -05:00 |
|
Neil Webber
|
59e2542ff1
|
pseudo-bkpt to look for bogus memory values outside 16 bit range
|
2024-04-23 13:16:55 -05:00 |
|
Neil Webber
|
f5509d373d
|
add check16 to verify no larger than 16 bit values got generated; also reduce footprint of physmem in most cases because of this check
|
2024-04-23 08:40:51 -05:00 |
|
Neil Webber
|
8259c035e0
|
safeguard literal from allowing bad values into physmem
|
2024-04-23 08:00:33 -05:00 |
|
Neil Webber
|
7a9fff6f8b
|
was masking 18 bits not 16 in ubmap
|
2024-04-23 07:55:16 -05:00 |
|
Neil Webber
|
872ad7833d
|
Make sure no illegal values outside 16 bit range loaded via loadphysmem
|
2024-04-23 07:39:18 -05:00 |
|
Neil Webber
|
6e54a9dc9e
|
accomodate octal formatting in machinestate for logging while still leaving raw values for, e.g., breakpoonts
|
2024-04-18 17:02:38 -05:00 |
|
Neil Webber
|
9408867f47
|
Delete mmio.py
|
2024-04-16 23:11:11 -05:00 |
|
Neil Webber
|
496f962c6c
|
incorporate booting LDA
|
2024-04-14 12:13:08 -05:00 |
|
Neil Webber
|
2ef5d03a8c
|
Merge pull request #19 from folkertvanheusden/EMKAB0
BusCycle.WRITE16 in ioregsets
|
2024-04-13 12:58:05 -05:00 |
|
folkert van heusden
|
81e8d1e9d9
|
missing
|
2024-04-13 19:38:57 +02:00 |
|
Neil Webber
|
1423e79813
|
Fix I/O to registers via Unibus addrs; also microbreak register
|
2024-04-13 12:24:48 -05:00 |
|
Neil Webber
|
e418355987
|
fix boot_lda
|
2024-04-11 17:40:09 -05:00 |
|
Neil Webber
|
22f05d58ca
|
Revamp the unibus device callback system. New version has explicit BusCycle argument in one callback function vs the mishmash of time-evolved methods for reset, bytes, etc
|
2024-04-11 16:59:06 -05:00 |
|
Neil Webber
|
c78972654c
|
Revamp the unibus device callback system. New version has explicit BusCycle argument in one callback function vs the mishmash of time-evolved methods for reset, bytes, etc
|
2024-04-11 16:58:41 -05:00 |
|
Neil Webber
|
1eba151bdb
|
Allow zero bytes between blocks in LDA
|
2024-04-11 16:40:07 -05:00 |
|
Neil Webber
|
6ef31cb034
|
Checking in an intermediate LDA implementation but going to change it to conform 100% w SIMH
|
2024-04-10 07:11:03 -05:00 |
|
Neil Webber
|
5ef8965399
|
Test physRW_N
|
2024-04-09 14:14:55 -05:00 |
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