folkert/simh-testsetgenerator
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227 commits

Author SHA1 Message Date
Patrick Linstruth
9247b96b37 AltairZ80: Add CTS command to M2SIO device 2023-07-30 09:23:44 -04:00
Howard M. Harte
f8a9f9bbe7 AltairZ80: m68k: Avoid buffer overflow detected by gcc 9.4.0. 2023-07-15 17:20:05 -04:00
Peter Schorn
4c1aee0887 AltairZ80: Correct spelling, formatting and years 2023-06-30 14:31:06 +02:00
Howard M. Harte
3acc69fbd2 AltairZ80: IBC MCC: Clean up HDC. 2023-06-18 16:12:30 -07:00
Peter Schorn
b0a496446f AltairZ80: Code cleanup and simplifications 2023-05-23 21:44:47 +02:00
B. Scott Michel
8b14bb69be
CMake build infrastructure II (#53) 
* CMake build infrastructure

The squashed commit that builds and packages releases for the SIMH
simulator suite with CMake, version 3.14 or newer.

See README-CMake.md for documentation.
 2023-05-17 20:18:42 -04:00
Howard M. Harte
2c6ad66acd AltairZ80: IBC: Fix MCC hard disk command mask. 2023-05-09 11:23:38 -04:00
Howard M. Harte
d2b663ec94 AltairZ80: IBC: Fix line endings. 2023-05-09 11:23:38 -04:00
Peter Schorn
1aa76cca6e AltairZ80: Additional checks for stop_cpu condition 2023-04-26 10:19:23 -04:00
Howard M. Harte
15d2b89573 AltairZ80: Add IBC Super Cadet / Middi Cadet support. 2023-04-25 21:00:06 -07:00
Peter Schorn
8b1b5eaeb7 AltairZ80: Add void when missing in function declaration 2023-04-05 16:28:15 +02:00
Peter Schorn
cc23adf6fd AltairZ80: Remove MetroWerks support for Macintosh OS 9 2023-04-05 16:15:41 +02:00
Patrick Linstruth
0bc7f09edf AltairZ80 VDM1: Corrects SCP error and video aspect ratio 
Corrects video window aspect ratio
Corrects 'd -m c mov m,b' SCP error
Changes default dirty flag from FALSE to TRUE
 2023-04-03 09:58:56 -04:00
Howard M. Harte
30d45ae7d9 AltairZ80: CPU: Properly reset PC. 
After adding the sim_clock_precalibrate_commands, the PC was not zero
at the sim> prompt after loading altairz80.

Set CPU_S to zero in cpu_reset to address this issue.
 2023-04-01 07:01:16 -07:00
Howard M. Harte
74eb45492a AltairZ80: Fix warnings in m68kfpu.c. 2023-04-01 07:01:15 -07:00
Howard M. Harte
7286b4a724 AltairZ80: Fix warnings in altairz80_sio.c. 2023-04-01 07:01:15 -07:00
Howard M. Harte
58b565f769 AltairZ80: Fix warnings in altairz80_hdsk.c. 2023-04-01 07:01:14 -07:00
Howard M. Harte
885f9123c1 AltairZ80: Fix warnings in altairz80_cpu.c. 2023-04-01 07:01:13 -07:00
Howard M. Harte
0521722525 AltairZ80: Resolve warnings in Flashwriter and Disk3. 2023-04-01 07:01:12 -07:00
Howard M. Harte
94d0e78a2e AltairZ80: Move find_unit_index() to altairz80_sys.c 2023-04-01 07:01:12 -07:00
Howard M. Harte
c6e9acab8a AltairZ80: wd179x: clean up / correct usage of status. 2023-04-01 07:01:11 -07:00
Patrick Linstruth
d70a0a16c5 AltairZ80 SOL20: Minor corrections and formatting 
While working on the AltairZ80 documentation, I found some problems
with the SOL20 registers and fixed some formatting issues.
Added static and "vdm1_" prefix to "charset" variable in s100_vdm1.c
 2023-03-24 21:42:10 -07:00
Mark Pizzolato
decbe5b76b Various simulators: Set line endings to CRLF for consistency, remove stray tabs 
Project standard source code has tabs converted to spaces and CRLF line
endings.

Other text files have CRLF line endings.
 2023-03-19 16:51:27 -04:00
Patrick Linstruth
cf9fac614c AltairZ80: Adds SOL20 and VDM1 devices 
This PR adds support for the Processor Technology VDM-1 display adapter and Sol-20 computer system. The VDM-1 was integrated into the Sol-20 but has been separated out into its own device.

This PR adds the following devices to the AltairZ80 simulator:

VDM1 - Processor Technology VDM-1 display adapter
SOL20 - Processor Technology SOL20 with SOLOS ROMs
SOL20K - SOL20 Keyboard (callback from VDM1)
SOL20T - SOL20 Tape (reads/writes cassette file images)
SOL20S - SOL20 Serial Port (TMXR capable)
SOL20P - SOL20 Printer Port (TMXR capable)
 2023-03-19 16:47:38 -04:00
Patrick Linstruth
825a505083 AltairZ80: Add sim_clock_precalibrate_commands 
Used to initialize SCP timers to prevent problems during simulator startup
when THROTTLE is being used.

/*
 * This sequence of instructions is a mix that mimics
 * a resonable instruction set that is a close estimate
 * to the calibrated result.
 */

static const char *cpu_clock_precalibrate_commands[] = {
    "-m 100 LXI H,200H",
    "-m 103 MVI B,0",
    "-m 105 DCR B",
    "-m 106 MOV M,B",
    "-m 107 INX H",
    "-m 108 JNZ 0105H",
    "-m 10B JMP 0100H",
    "PC 100",
    NULL};
 2023-03-19 16:45:19 -04:00
Howard M. Harte
c5ce339566 AltairZ80: ADCS6: Fix uninitialized unit structure 
Proper initialization of the ADCS6 unit data structure depended on the
ADCS6 device being enabled.  In cases where the ADCS6 unit was not
enabled, non-debug builds may crash on some host platforms depending on
compiler/memory layout.
 2023-02-06 19:12:49 -08:00
Howard M. Harte
09899c18fa AltairZ80: 2SIO: Fix potential NULL pointer dereference. 2023-01-29 10:19:07 -08:00
Howard M. Harte
023cd3b387 AltairZ80: Add support for NMI interrupts. 2023-01-29 10:19:07 -08:00
Howard M. Harte
11e555bb20 AltairZ80: Fix width of vectorInterrupt pseudo register. 2023-01-29 10:19:07 -08:00
Howard M. Harte
dcd3e48048 AltairZ80: ADCS6: Initialize extended UDATA in reset routine. 
As pointed out by @markpizz , the only allowed macro to initialize UNIT
structures is the UDATA macro.

Setting additional UNIT data structure items should be set through explicit
initialization code in the DEVICE reset routine.
 2023-01-18 12:43:34 -05:00
Patrick Linstruth
1a1366650c AltairZ80: Adds -H switch to LOAD command for loading Intel hex files 2023-01-17 20:08:39 -08:00
Howard M. Harte
74197bfb77 AltairZ80: SIO: Allow keyboard interrupts from configurable SIO port. 2022-12-05 12:16:00 -05:00
Howard M. Harte
9dd2fe1615 AltairZ80: ADC Super-Six: add Z80-CTC support. 2022-12-05 12:16:00 -05:00
Howard M. Harte
4359a80670 AltairZ80: wd179x: Add support for raw disk images. 
Support standard 8-inch SSSD raw disk images, in addition to .imd.
 2022-12-05 12:16:00 -05:00
Patrick Linstruth
3ec3e3aa8f AltairZ80: Fix HALT stop code conflict with ON ERROR 
AltairZ80 uses 0 for the VM-specific HLT instruction stop code.
SCP defines SCPE_OK as 0.
SCP uses 0 to mean all errors ("ON ERROR").

The command "ON 0" will generate "%SIM-ERROR: Invalid argument: 0".

This PR changes the HALT stop code from 0 to 5.
 2022-11-27 17:14:57 -05:00
Howard M. Harte
60599a9f62 AltairZ80: HDC-1001: Fix MSVC /W4 warnings. 2022-11-27 14:38:05 -05:00
Howard M. Harte
75f11a8e3d AltairZ80: wd179x: Code cleanup and fix MSVC /W4 warnings. 2022-11-27 14:38:05 -05:00
Howard M. Harte
7cca92ce28 AltairZ80: SIO: Support 32-bits for setFCBAddressCmd. 
The M68K requires more than 16-bits for the FCB address.  Expand to
32-bits.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
87581b865f AltairZ80: M68K: Add support for additional 68000 variants 
68000, 68010, 68020, 68030, 68040 and LC/EC variants.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
6cd89205a3 AltairZ80: M68K: Add support for memory-mapped I/O. 
Allows the M68K CPU to take advantage of additional AltairZ80 peripherals.
 2022-11-27 14:38:05 -05:00
Howard M. Harte
7094222ada AltairZ80: SCP300F: Add support for MS-DOS 2.00. 
* Add support for 8259 interrupt controller.
* Add support for Cromemco and Tarbell Monitor ROMs.
* To allow port 0xFE to be used by the simh_dev.
* Use the CPU's SR instead of a SCP300F-specific one.
* 9513 RTC support.
 2022-11-27 14:38:05 -05:00
Patrick Linstruth
8b181a360c AltairZ80: PMMI device DTR/RTS default changes and support for sockets 2022-11-23 11:23:20 -05:00
Patrick Linstruth
e2d422c2d3 AltairZ80: Add support for Morrow Micro Decision 
Moved MMD and MMDM devices under Morrow Devices comment.
 2022-11-23 11:22:51 -05:00
Patrick Linstruth
7a5432d9e2 AltairZ80: Add "MEM" and "REG" simulator-specific commands 
sim> mem df00
DF00 C3 5C E2 C3 58 E2 7F 00 43 6F 70 79 72 69 67 68 .\..X...Copyrigh
DF10 74 20 31 39 37 39 20 28 63 29 20 62 79 20 44 69 t 1979 (c) by Di
DF20 67 69 74 61 6C 20 52 65 73 65 61 72 63 68 20 20 gital Research
DF30 20 20 20 20 00 00 00 00 00 00 00 00 00 00 00 00     ............
DF40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
DF50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
DF60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ....s...ub...m..
DF70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ..I..tT...e.....
DF80 00 00 00 00 00 00 00 00 08 DF 00 00 5F 0E 02 C3 d....4...l.._0.r
DF90 05 00 C5 CD 8C DF C1 C9 3E 0D CD 92 DF 3E 0A C3 .d..M...>....>..
DFA0 92 DF 3E 20 C3 92 DF C5 CD 98 DF E1 7E B7 C8 23 ..> ..a.....~..#
DFB0 E5 CD 8C DF E1 C3 AC DF 0E 0D C3 05 00 5F 0E 0E ...r........._..
DFC0 C3 05 00 CD 05 00 32 EE E6 3C C9 0E 0F C3 C3 DF ...K..2..<..'.s.
DFD0 AF 32 ED E6 11 CD E6 C3 CB DF 0E 10 C3 C3 DF 0E .2...a...p.P....
DFE0 11 C3 C3 DF 0E 12 C3 C3 DF 11 CD E6 C3 DF DF 0E ...r...0..v.....
DFF0 13 C3 05 00 CD 05 00 B7 C9 0E 14 C3 F4 DF 11 CD .....a.l........

sim> reg
C0Z1M0E1I1 A=02 B=007F D=DF06 H=EA0E S=EA37 P=FA6B ANI 01h
sim> set on
sim> on error reg
sim> s

Step expired, PC: 0FA6D (JZ 0FA69h)
C0Z1M0E1I1 A=00 B=007F D=DF06 H=EA0E S=EA37 P=FA6D JZ 0FA69h
sim> s

Step expired, PC: 0FA69 (IN 10h)
C0Z1M0E1I1 A=00 B=007F D=DF06 H=EA0E S=EA37 P=FA69 IN 10h
sim> s

Step expired, PC: 0FA6B (ANI 01h)
C0Z1M0E1I1 A=02 B=007F D=DF06 H=EA0E S=EA37 P=FA6B ANI 01h
 2022-11-23 11:22:12 -05:00
Howard M. Harte
33aad32550 AltairZ80: TDD: Remove unused variable. 2022-11-19 13:48:34 -05:00
Howard M. Harte
f578ce76a7 AltairZ80: DJHDC: Conditionalize interrupt support. 2022-11-19 13:48:34 -05:00
Howard M. Harte
61a520a978 AltairZ80: Morrow HDC-DMA Hard Disk Controller. 2022-11-15 12:21:58 -05:00
Howard M. Harte
f77485ca99 AltairZ80: Add Tarbell Double-Density FDC 
This controller is based the wd179x, adding a couple of Tarbell-specific
registers.
 2022-11-15 12:21:58 -05:00
Howard M. Harte
3719b46524 AltairZ80: SIO: Fix warning for type mismatch. 
Fix warning introduced in PR#108
 2022-11-10 10:45:46 -05:00
Howard M. Harte
71913f26eb AltairZ80: SIO: Add setFCBAddressCmd to simh_dev. 
* Allows setting the FCB address used to send filenames between the host
  and guest operating systems.
* Increment the SIMH device version to SIMH005.
 2022-11-07 09:22:14 -05:00