folkert van heusden
a672841865
clean-up
2023-03-21 21:16:41 +01:00
folkert van heusden
5bad90a820
lock MMR2 when upper 3 bits of MMR0 are set (any of them)
2023-03-21 19:40:32 +01:00
folkert van heusden
253d8437eb
throw exception when scheduling trap 004 for non existing pages
2023-03-21 19:34:58 +01:00
folkert van heusden
7ea2fa0033
only execute trap when MRR0_bit_9 AND MMR0_&_0xf000 == 0
2023-03-21 18:09:36 +01:00
folkert van heusden
06b5c027d3
do not run trap when 4 upper bits of MMR0 are set (any of them), also set bit 12 when there is a case for traping
2023-03-21 15:07:51 +01:00
folkert van heusden
69118435c4
A/W flags of PDR are reset when PAR is written to
2023-03-21 14:02:51 +01:00
folkert van heusden
406c2a5a09
i/o logging: handle peek_only-flag correct
2023-03-21 13:45:17 +01:00
folkert van heusden
470919e85d
If bit 9 of MMR0 is not set, abort an instruction but do not trap
2023-03-21 11:04:04 +01:00
folkert van heusden
49d16a72e6
ACF logic clean-up
2023-03-21 10:59:53 +01:00
folkert van heusden
ff40cdc82c
11/34 mode removed
2023-03-21 10:32:46 +01:00
folkert van heusden
fa9f57caa0
Bit 8 of MMR0 enables relocation only for 'destination'. Implemented by
...
checking for bit 8 when doing a write.
https://retrocomputing.stackexchange.com/questions/24664/pdp-11-34-bit-8-in-mmr0-maintenance-mode-what-does-it-do
2023-03-21 09:00:40 +01:00
folkert van heusden
6ac4a9ecb6
odd address check in i/o when in !word_mode
2023-03-21 08:49:49 +01:00
folkert van heusden
c77ae1d617
bus: trap(4) when reading from/writing to i/o or ram that does not exists/is not mapped
2023-03-20 22:27:04 +01:00
folkert van heusden
d8912d66f4
always clear MMR3 bit 5 as unibus mapping is not implemented yet
2023-03-20 21:10:16 +01:00
folkert van heusden
6cbb5c3faa
11/70 has only 8 bits for "microprogram break register"?
2023-03-20 19:39:31 +01:00
folkert van heusden
3df5d20152
ADDR_MICROPROG_BREAK_REG read access
2023-03-20 18:16:29 +01:00
folkert van heusden
84fd36f771
odd addressing trap in i/o space
2023-03-20 18:01:50 +01:00
folkert van heusden
831a01a5b1
fix for CLR & odd addressing-trap
2023-03-20 16:02:27 +01:00
folkert van heusden
ce730c6ea1
microprogram break register
2023-03-20 14:23:32 +01:00
folkert van heusden
2bf8b92217
0177764: system id
2023-03-20 09:58:56 +01:00
folkert van heusden
35eed8e117
MTP./MFP. trap on odd addressing
2023-03-19 20:57:07 +01:00
folkert van heusden
b7512ae3cd
show console LEDs
2023-03-19 15:05:00 +01:00
folkert van heusden
28750c56d8
also log i/o r/w
2023-03-19 14:43:06 +01:00
folkert van heusden
ac14e7be71
logging
2023-03-19 09:04:48 +01:00
folkert van heusden
3ede69e864
CLR/CLRB fix (2)
2023-03-18 23:34:41 +01:00
folkert van heusden
b035260e07
CLR/CLRB fix
2023-03-18 22:56:08 +01:00
folkert van heusden
488bb55cec
fixes for problems found by EQKCE1
2023-03-18 21:53:37 +01:00
folkert van heusden
eff5a799e5
unfixed the broken fix from 076575c405
2023-03-18 20:11:47 +01:00
folkert van heusden
0203371f44
typo
2023-03-18 19:21:54 +01:00
folkert van heusden
076575c405
corrected(?) SYSSIZE registers
2023-03-18 19:12:42 +01:00
folkert van heusden
a935fe44d7
use d-space where required
2023-03-18 14:45:44 +01:00
folkert van heusden
d7ca617155
assert
2023-03-13 12:25:24 +01:00
folkert van heusden
08d8c75d58
- readPhysical
...
- initialize psw to 0 to match pypdp (for diff)
- SUB instruction V-flag may have been incorrect
- MFPI/MTPI flags
- MFPI readPhysical
- bootloader from pypdp (for diff)
2023-03-12 22:32:53 +01:00
folkert van heusden
d68a5af55e
writePhysical
2023-03-11 21:54:18 +01:00
folkert van heusden
3ef8bd930d
Added:
...
* calculate data/instruction physical addresses from a virtual address
memory_addresses_t calculate_physical_address(const int run_mode, const uint16_t a);
* check if a 'memory_address_t'-address would cause a fault
void check_address(const bool trap_on_failure, const bool is_write, const memory_addresses_t & addr, const bool word_mode, const bool is_data, const int run_mode);
2023-03-11 21:13:46 +01:00
folkert van heusden
2fd1da58bb
Merge branch 'master' into d_i
2022-11-10 09:13:22 +01:00
folkert van heusden
381879030f
helpful logging
2022-07-02 16:55:55 +02:00
folkert van heusden
0d7cbe3da9
replaced addresses by defines
2022-06-28 17:58:04 +02:00
folkert van heusden
55ad46c55c
Code-cleanup (PAR/PDR read/write helper methods)
2022-06-28 16:31:17 +02:00
folkert van heusden
42fc44b206
page written bit only when written
...
double trap: use stack from 000004
2022-06-24 20:03:32 +02:00
folkert van heusden
88933e303c
Console switches configurable on command line
2022-06-19 15:39:46 +02:00
folkert van heusden
f4d991e86a
Debugging
2022-06-19 02:33:06 +02:00
folkert van heusden
fdeda07d71
current page in mmr0 for odd addressing error
2022-06-19 00:22:04 +02:00
folkert van heusden
d2a4776742
first thing is check for odd addressing
2022-06-18 19:44:55 +02:00
folkert van heusden
51670ef199
double traps
...
odd addressing trap
2022-06-18 12:10:23 +02:00
folkert van heusden
7427ddc226
PDR-len calculation fix(?)
...
do not update MMR0 when already set
2022-06-18 11:42:40 +02:00
folkert van heusden
7605c934c2
throw 3/4: add run mode
2022-06-18 09:10:51 +02:00
folkert van heusden
9d55740a0f
SR0 errors by KKTBD0 fixed
2022-06-18 08:48:29 +02:00
folkert van heusden
d851c4b9a0
18bit mode
2022-06-18 08:18:27 +02:00
folkert van heusden
015ef244b8
Merge branch 'master' into d_i
2022-06-18 08:05:40 +02:00
